Figure 2.36 of the text, page 71 show a the logic diagram of 2-to-1 multiplexer (or MUX). (a) Determine the cost and delay of the circuit. (b) Write SOP and POS expressions for the multiplexer. (c) Implement the multiplexer using only NAND gates. (d) Implement the multiplexer using only NOR gates 2
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